JPS63141330A - 半導体集積回路装置 - Google Patents

半導体集積回路装置

Info

Publication number
JPS63141330A
JPS63141330A JP61289341A JP28934186A JPS63141330A JP S63141330 A JPS63141330 A JP S63141330A JP 61289341 A JP61289341 A JP 61289341A JP 28934186 A JP28934186 A JP 28934186A JP S63141330 A JPS63141330 A JP S63141330A
Authority
JP
Japan
Prior art keywords
aluminum
pad electrode
aluminium
out conductor
slit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61289341A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0519982B2 (en]
Inventor
Atsushi Kishi
岸 淳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61289341A priority Critical patent/JPS63141330A/ja
Publication of JPS63141330A publication Critical patent/JPS63141330A/ja
Publication of JPH0519982B2 publication Critical patent/JPH0519982B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
    • H01L2224/05557Shape in side view comprising protrusions or indentations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85203Thermocompression bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Wire Bonding (AREA)
JP61289341A 1986-12-03 1986-12-03 半導体集積回路装置 Granted JPS63141330A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61289341A JPS63141330A (ja) 1986-12-03 1986-12-03 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61289341A JPS63141330A (ja) 1986-12-03 1986-12-03 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS63141330A true JPS63141330A (ja) 1988-06-13
JPH0519982B2 JPH0519982B2 (en]) 1993-03-18

Family

ID=17741946

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61289341A Granted JPS63141330A (ja) 1986-12-03 1986-12-03 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPS63141330A (en])

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5804883A (en) * 1995-07-13 1998-09-08 Samsung Electronics Co., Ltd. Bonding pad in semiconductor device
WO2006046302A1 (ja) * 2004-10-29 2006-05-04 Spansion Llc 半導体装置及びその製造方法
JP2007208209A (ja) * 2006-02-06 2007-08-16 Fujitsu Ltd 半導体装置及びその製造方法
US7514790B2 (en) 2005-06-02 2009-04-07 Seiko Epson Corporation Semiconductor device and method of manufacturing a semiconductor device
JP2009111073A (ja) * 2007-10-29 2009-05-21 Elpida Memory Inc 半導体装置
KR100903696B1 (ko) * 2007-05-22 2009-06-18 스펜션 엘엘씨 반도체 장치 및 그 제조 방법
JP2012160633A (ja) * 2011-02-02 2012-08-23 Lapis Semiconductor Co Ltd 半導体装置の配線構造及びその製造方法
JP2013157390A (ja) * 2012-01-27 2013-08-15 Kyocera Corp 配線基板および電子装置
JPWO2012073302A1 (ja) * 2010-11-29 2014-05-19 トヨタ自動車株式会社 半導体装置

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5804883A (en) * 1995-07-13 1998-09-08 Samsung Electronics Co., Ltd. Bonding pad in semiconductor device
GB2434917B (en) * 2004-10-29 2010-05-26 Spansion Llc Semiconductor device and maufacturing method therefor
WO2006046302A1 (ja) * 2004-10-29 2006-05-04 Spansion Llc 半導体装置及びその製造方法
GB2434917A (en) * 2004-10-29 2007-08-08 Spansion Llc Semiconductor device and maufacturing method thereof
JPWO2006046302A1 (ja) * 2004-10-29 2008-05-22 スパンション エルエルシー 半導体装置及びその製造方法
JP4777899B2 (ja) * 2004-10-29 2011-09-21 スパンション エルエルシー 半導体装置
US7514790B2 (en) 2005-06-02 2009-04-07 Seiko Epson Corporation Semiconductor device and method of manufacturing a semiconductor device
JP2007208209A (ja) * 2006-02-06 2007-08-16 Fujitsu Ltd 半導体装置及びその製造方法
KR100903696B1 (ko) * 2007-05-22 2009-06-18 스펜션 엘엘씨 반도체 장치 및 그 제조 방법
JP2009111073A (ja) * 2007-10-29 2009-05-21 Elpida Memory Inc 半導体装置
JPWO2012073302A1 (ja) * 2010-11-29 2014-05-19 トヨタ自動車株式会社 半導体装置
JP2012160633A (ja) * 2011-02-02 2012-08-23 Lapis Semiconductor Co Ltd 半導体装置の配線構造及びその製造方法
JP2013157390A (ja) * 2012-01-27 2013-08-15 Kyocera Corp 配線基板および電子装置

Also Published As

Publication number Publication date
JPH0519982B2 (en]) 1993-03-18

Similar Documents

Publication Publication Date Title
EP0637840A1 (en) Integrated circuit with active devices under bond pads
US4467345A (en) Semiconductor integrated circuit device
JPS63141330A (ja) 半導体集積回路装置
US5453913A (en) Tab tape
JPS5854661A (ja) 多層セラミツク半導体パツケ−ジ
JPS6049649A (ja) 半導体集積回路装置
JPS58200526A (ja) 多層配線を有する半導体装置
JP2982182B2 (ja) 樹脂封止型半導体装置
JPS63283041A (ja) 半導体集積回路装置
JPH0691127B2 (ja) 半導体集積回路
JP3098333B2 (ja) 半導体装置
TWI889335B (zh) 承載結構及具有該承載結構之電子封裝件
JPH05226500A (ja) 実装回路基板
JP2822996B2 (ja) 半導体装置
JPH0574957A (ja) 半導体装置
JP3075858B2 (ja) 半導体集積回路装置
JPH02210858A (ja) 半導体装置
JPH0377326A (ja) バンプ電極形半導体装置
JPS5984552A (ja) 集積回路装置
JPS62183155A (ja) 半導体集積回路装置
JPS63111651A (ja) 半導体装置
JPH02177451A (ja) 半導体集積回路装置
JPH065781A (ja) 半導体装置
JPH05234998A (ja) 半導体装置
JPS63143826A (ja) 半導体装置